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Saturday, July 14, 2012

VHDL & VERILOG

VHDL (Very High speed integrated circuit Hardware Description Language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits.
                                                                        
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Verilog is a hardware description language (HDL) used to model electronic systemsVerilog HDL, not to be confused with VHDL (a competing language), is most commonly used in the design, verification, and implementation of digital logic chips at the register-transfer level of abstraction. It is also used in the verification of analog and mixed-signal circuits.

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